FLOATING GATE SPACER FOR CONTROLLING A SOURCE REGION FORMATION IN A MEMORY CELL

A method is provided for forming an integrated circuit memory cell, e.g., flash memory cell. A pair of spaced-apart floating gate structures may be formed over a substrate. A non-conformal spacer layer may be formed over the structure, and may include spacer sidewall regions laterally adjacent the floating gate sidewalls. A source implant may be performed, e.g., via HVII, to define a source implant region in the substrate. The spacer sidewall region substantially prevents penetration of source implant material, such that the source implant region is self-aligned by the spacer sidewall region.The source implant material diffuses laterally to extend partially under the floating gate. Using the non-conformal spacer layer, including the spacer sidewall regions, may (a) protect the upper corner, or "tip" of the floating gate from rounding and (b) provide lateral control of the source junction edge location under each floating gate. 本发明提供了一种用于形成集成电路存储器单元(例如，闪存存储器单元)的方法。一对间隔开的浮栅结构可在衬底上方形成。非共形间隔层可在该结构上方形成，并且可包括与浮栅侧壁横