Method and apparatus for encoding and decoding data in memory system

A decoding circuit includes a bose-chaudhuri-hocquenghem (BCH) decoder. The BCH decoder includes a Syndrome stage for generating syndromes based on a BCH encoded word, a Berlekamp-Massey (BM) stage performing a Berlekamp-Massey algorithm on the syndromes to generate Error Location Polynomial (ELP) coefficients, a Chien stage that performs a Chien search on the ELP coefficients by using the Fast Fourier Transform (FFT) to generate error bits and iteration information, and a Frame Fixer stage configured to reorder the error bits to be sequential based on the iteration information. The BCH decoder decodes the BCH encoded word by using the reordered error bits. 一种解码电路，包括Bose-Chaudhuri-Hocquenghem(BCH)解码器。BCH解码器包括用于基于BCH编码字来生成校正子的校正子级、对校正子执行Berlekamp-Massey(BM)算法以生成错误位置多项式(ELP)系数的Berlekamp-Massey级、使用快速傅立叶变换(FFT)对ELP系数执行Chien搜索以生成错误位和迭代信息的Chien级、以及被配置为基于迭代信息将错误位重新排序为按顺序的帧修复器级。BCH解码器使用重新排序的错误位解码BCH编码字。