Compression acceleration method of LSTM network and FPGA accelerator

The invention provides a compression acceleration method for an LSTM network. The compression acceleration method comprises the following steps of: 1), initializing a model, and carrying out a normalization operation after the model is initialized, wherein all weights obey normal distribution in a range from 0 to 1; step 2), constructing a blocked Toeplitz matrix by using part of parameters of theoriginal weight matrix to replace the original matrix, besides, training an activation function by adopting a piecewise linear approximation method until network convergence; 3) performing grouping quantification on the trained network, and then performing grouping training until convergence; step 4), and carrying out slight clipping operation on the quantized network, and finally training the network until convergence to obtain a final compressed network. By compressing the network parameters, the network can be realized by only using on-chip resources, and the precision is hardly influenced. 本发明提出一种LSTM网络的压缩加速方法，包括