HARDWARE PROCESSORS AND METHODS FOR EXTENDED MICROCODE PATCHING

Hardware processors and methods for extended microcode patching through on-die and off-die secure storage are described. In one embodiment, the additional storage resources used for storing micro-operations are section(s) of a cache that are unused at runtime and/or unused by a configuration of a processor. For example, the additional storage resources may be a section of a cache that is used to store context information from a core when the core is transitioned to a power state that shuts off voltage to the core. Non-limiting examples of such sections are one or more sections for: storage ofcontext information for a transition of a thread to idle or off, storage of context information for a transition of a core for a multiple core processor to idle or off, or storage of coherency information for a transition of a cache coherency circuit (e.g., cache box (CBo)) to idle or off. 描述了用于通过管芯上和管芯外安全存储扩展微代码修补的硬件处理器和方法。在一个实施例中，用于存储微操作的附加存储资源是在运行时未使用和/或未由处理器的配置使用的高速缓存的(多个)部分。例如，附加的存储资源可以是高速缓存的一部分，该部分用于在核转变为关断至核的电压的功率状