DECISION FEEDBACK EQUALIZERS AND METHODS OF DECISION FEEDBACK EQUALIZATION

The present disclosure relates to a 1/K-rate decision feedback equalizer (DFE) and to a decision feedback equalization method. The DFE comprises: (i) a summing circuit configured to combine K intersymbol interference (ISI) cancellation signals with an input signal of the DFE, (ii) K branches each in...

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Bibliographische Detailangaben
Hauptverfasser: SHAHRAMIAN SHAYAN, DEHLAGHI BEHZAD
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:The present disclosure relates to a 1/K-rate decision feedback equalizer (DFE) and to a decision feedback equalization method. The DFE comprises: (i) a summing circuit configured to combine K intersymbol interference (ISI) cancellation signals with an input signal of the DFE, (ii) K branches each including a reset-to-zero (RZ) latch configured to receive an output signal of the summing circuit according to a clock signal and to produce a RZ signal, and (iii) a feedback circuit including K filters each configured to receive a respective RZ signal from a respective RZ latch and to produce a respective ISI cancellation signal. The method comprises: (i) producing an output signal for K branches based on K cancellation signals and on an input signal, (ii) producing K RZ signals based on the output signal and on a clock signal, and (iii) producing the K ISI cancellation signals based on the K RZ signals. 本发明涉及一种1/K速率判决反馈均衡器(decision feedback equalizer,DFE)及判决反馈均衡方法。所述DFE包括:(i)加法电路,用于将K个符号间干扰(intersymbol interferenc