System on Chip (SOC) Current Profile Model for Integrated Voltage Regulator (IVR) Co-design

A System On Chip (SOC) current profile model for Integrated Voltage Regulator (IVR) co-design may be provided. A first current profile model may be extracted corresponding to an SOC at a first designstage of the SOC. Then it may be determined that an IVR and the SOC pass a first co-simulation based on the extracted first current profile model. Next, a second current profile model may be extractedcorresponding to the SOC at a second design stage of the SOC. Then it may be determined that the IVR and the SOC pass a second co-simulation based on the extracted second current profile model. A third current profile model may be extracted corresponding to the SOC at a third design stage of the SOC. Then it may be determined that the IVR and the SOC pass a third co-simulation based on the extracted third current profile model. 一集成电路共设计方法，其包含以下步骤：提取一第一电流曲线模型是相关于在该SOC的一第一设计阶段的一SOC。然后根据该提取第一电流曲线模型，决定一IVR及该SOC是否通过一第一共模拟。下一个，提取一第二电流曲线模型，该第二电流曲线模型是相关于在该SOC的一第二设计阶段的该SOC。然后根据该提取第二电流曲线模型，决定该IVR与该SOC是否通过一第二共模拟。提取一第三电流曲线模型，该提取第