High-capacity fast NandFlash storage implementation method based on software and hardware combination mode
The invention discloses a high-capacity fast NandFlash storage implementation method based on a software and hardware combination mode. The method comprises the following steps: optimizing a read-write mode of NandFlash according to the characteristics of the NandFlash in combination with the charac...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a high-capacity fast NandFlash storage implementation method based on a software and hardware combination mode. The method comprises the following steps: optimizing a read-write mode of NandFlash according to the characteristics of the NandFlash in combination with the characteristics of double cache blocks of a controller, and controlling a plurality of NandFlash blocks byadopting a parallel read-write mode; in the aspect of implementation, analyzing the time sequence and the command of a local bus controller of a processor, remapping part of idle physical address space under the control of a local bus in an FPGA chip, and achieving composite chip selection of multiple NandFlash chips in the FPGA chip; modifying a software driver such that a serial access commandof the modified software driver to a single-chip memory is changed into alternate access to two NandFlash chips; and by utilizing the waiting time of the NandFlash chip access, carrying out the read-write access to the cache b |
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