Three-dimensional semiconductor memory device

A three-dimensional semiconductor memory device is provided. The device may include a first stack structure on a substrate including a cell array region and a connection region, a second stack structure on the first stack structure, a first vertical channel hole penetrating the first stack structure...

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Bibliographische Detailangaben
Hauptverfasser: YANG JAEHYUN, AN KYONG WON, YONG SOOKYEOM, CHEON YOUNGJUN, KIM BIO, JEE JUNGGEUN, KIM YUJIN
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:A three-dimensional semiconductor memory device is provided. The device may include a first stack structure on a substrate including a cell array region and a connection region, a second stack structure on the first stack structure, a first vertical channel hole penetrating the first stack structure and partially exposing the substrate and a bottom surface of the second stack structure, on the cell array region, a second vertical channel hole penetrating the second stack structure and exposing the first vertical channel hole, on the cell array region, a bottom diameter of the second vertical channel hole being smaller than an top diameter of the first vertical channel hole, and a buffer pattern placed in the first vertical channel hole and adjacent to the bottom surface of the second stackstructure. 提供了一种三维半导体存储器装置。该装置可以包括在包括单元阵列区和连接区的基底上的第一堆叠结构、在第一堆叠结构上的第二堆叠结构、在单元阵列区上并且穿透第一堆叠结构并使基底和第二堆叠结构的底表面暴露的第一竖直沟道孔、在单元阵列区上并且穿透第二堆叠结构并使第一竖直沟道孔暴露的第二竖直沟道孔以及放置在第一竖直沟道孔中并且与第二堆叠结构的底表面相邻的缓冲图案,第二竖直沟道孔的底部直径小于第一竖直沟道孔的顶部直径。