Method and system for realizing 4M 1553B bus protocol based on FPGA

The invention discloses a method and a system for realizing a 4M 1553B bus protocol based on an FPGA, and the method comprises the following steps: 1), collecting the data of an A bus and a B bus, carrying out the Manchester encoding and decoding of the bus data, and obtaining a serial bit stream; 2) performing bit synchronization on the serial bit stream, and performing parity check on the synchronized serial bit stream to obtain bus data; 3) performing bus arbitration on the bus data, determining a used A bus or B bus, and then performing message analysis and processing on the bus data according to a 1553B link layer protocol to obtain 1553B bus messages, thereby realizing transceiving control of ten 1553B message formats; and 4) placing message receiving data in the 1553B bus message ina message receiving cache, placing message sending data in the 1553B bus message in a sending cache, and completing interaction with the control chip through an input/output interface. According to the method, a 4M 1553B bus