Chip packaging method, chip and chip packaging assembly
The invention provides a chip packaging method. The metal layer can be prevented from warping while heat dissipation of the chip is realized by using a metal layer. The method comprises the followingsteps: an open pore is manufactured on a substrate; the chip is embedded in the open pore; on the fir...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a chip packaging method. The metal layer can be prevented from warping while heat dissipation of the chip is realized by using a metal layer. The method comprises the followingsteps: an open pore is manufactured on a substrate; the chip is embedded in the open pore; on the first surface of the substrate, a first metal layer and a second metal layer which are used for carrying out heat dissipation on the chip are manufactured, wherein a spacing layer is arranged between the first metal layer and the second metal layer, at least one through hole is arranged in the spacinglayer, and the second metal layer covers the spacing layer and fills the at least one through hole; and at least one wiring layer is manufactured on the second surface of the substrate.
本申请提供一种芯片封装的方法,在利用金属层实现对芯片散热的同时,可以防止该金属层发生翘曲。该方法包括:在基板上制作开孔;将所述芯片嵌埋至所述开孔内;在所述基板的第一表面上,制作用于对所述芯片进行散热的第一金属层和第二金属层,其中,所述第一金属层和所述第二金属层之间设置有间隔层,所述间隔层中设置有至少一个通孔,所述第二金属层覆盖所述间隔层且填充所述至少一个通孔;在所述基板的第二表面上,制作至少一个布线层。 |
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