Control circuit for ternary content addressable memory

The invention discloses a control circuit for a ternary content addressable memory. The control circuit for a ternary content addressable memory comprises a first logic unit and a second logic unit, wherein the first logic unit is coupled to the first storage unit, the second storage unit, the first lookup line, the second lookup line, the reference voltage end and the matching line; the second logic unit is coupled to the first storage unit, the second storage unit, the first lookup line, the second lookup line, the first power supply line and the second power supply line; and when the voltage of the first lookup line and the voltage of the second lookup line are matched with the voltage of the first storage unit and the voltage of the second storage unit, the second logic unit provides apath to enable the first power supply line to be electrically connected with the second power supply line. 本发明公开一种用于三态内容寻址存储器的控制电路。该三态内容寻址存储器的控制电路包括第一逻辑单元及第二逻辑单元。第一逻辑单元耦接于第一存储单元、第二存储单元、第一查找线、第二查找线，参考电压端及匹配线。第二逻辑单元耦接于所述第一存储单元