Method for correcting simulation clock by adopting simulation time relay of secondary device

The invention discloses a method for correcting a simulation clock by adopting a simulation time relay of a secondary device. The method comprises the following steps of: starting clock period calculation; determining whether a simulation event is executed or not; if the simulation event is not exec...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: GAO PING, SUN PENGBO, ZHANG DONGYUAN, ZHAI YUGUANG, WANG JIANGONG
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The invention discloses a method for correcting a simulation clock by adopting a simulation time relay of a secondary device. The method comprises the following steps of: starting clock period calculation; determining whether a simulation event is executed or not; if the simulation event is not executed, pushing a simulation clock; if the simulation event is executed, adding the started time-delaysimulation time relay in the processing process into a starting simulation time relay sequence, and calculating the time consumed in the processing process; and checking the action sequence of the starting simulation time relay, and correcting a clock advancing step length according to the minimum delay. According to the method, the situation that the simulation clock spans the started simulationtime relays due to the fact that the simulation clock adopts a fixed propulsion step length can be avoided, and particularly, incorrectness caused when complex logic exists among multiple sets of simulation time relays is avo