Vertically-interconnected semiconductor device including branch memory die module

The invention discloses a semiconductor device, and the semiconductor device includes one or more integrated memory modules. Each integrated memory module may include a pair of semiconductor bare elements that together operate as a single, integrated flash memory. In one example, a first bare element may include an array of memory cells, and a second bare element may include a logic circuit such as a CMOS integrated circuit. In one example, the first bare element includes a set of bonding pads that remain uncovered when the first and second bare elements are bonded together. Conductive pillarsmay then be formed over the uncovered bond pads. 公开了一种半导体装置，包含一个或多个集成存储器模块。每个集成存储器模块可以包含一对半导体裸芯，其一起作为单个的、集成的闪速存储器操作。在一个示例中，第一裸芯可以包含存储器单元阵列，并且第二裸芯可以包含诸如CMOS集成电路的逻辑电路。在一个示例中，第一裸芯包含一组接合垫，当第一和第二裸芯接合在一起时，该组接合垫保持为未覆盖的。然后可以在未覆盖的接合垫上形成导电柱。