Analog-to-digital converter circuit and method for analog-to-digital conversion

In one embodiment, an analog-to-digital converter circuit has an input (InA) for receiving a first analog signal level (In1) and a second analog signal level (In2), a ramp generator (RG) adapted to provide a ramp signal (Vramp), a comparison unit (CMP) coupled to the input (InA) and the ramp generator (RG), a control unit (CTL) coupled to the comparison unit (CMP) the control unit (CTL) having a counter, the control unit (CTL) being prepared to enable the counter as a function of a comparison of the ramp signal (Vramp) with the first analog signal level (In1) and the second analog signal level(In2), and an output (Out) for providing an output digital value as a function of a relationship between the first analog signal level (In1) and the second analog signal level (In2). Therein the rampsignal (Vramp) has at least one linearly rising and at least one linearly falling portion and an adjustable shift (Rs1) at a reversal point between the rising and the falling portion of the ramp signal (Vramp), the shift (Rs1