Self-closed loop verification method for embedded software
The invention discloses a self-closed loop verification method for embedded software. A special instruction and a special parcel are added in a communication protocol between an upper computer and anembedded data forwarding control box; a special module is added in the embedded software; data closed...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a self-closed loop verification method for embedded software. A special instruction and a special parcel are added in a communication protocol between an upper computer and anembedded data forwarding control box; a special module is added in the embedded software; data closed-loop transmission is realized between the upper computer and the embedded data forwarding controlbox, and meanwhile, the added special module has the function of a simple missile simulator, so that an upper computer launch control logic verification test or an embedded software verification testcan still be normally carried out under the condition that a lower computer is lacked; the method is simple in design and high in practicability, the test cost can be greatly reduced, and the beneficial effects of the method are verified in the actual use process.
本发明公开了一种嵌入式软件自闭环验证方法,通过在上位机与嵌入式数据转发控制盒间的通讯协议中增加专用指令和专用邮包,并在嵌入式软件中增加专用模块,使上位机和嵌入式数据转发控制盒之间实现了数据闭环传输,同时增加的专用模块具备简易导弹模拟器的功能,使上位机发控逻辑验证试验或嵌入式软件的验证试验在缺失下位机的情况下仍可以正常进行; |
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