Memory device

A memory device is disclosed that includes a page buffer unit including a plurality of latches latching each of a plurality of pieces of dummy data of selected memory cells according to a plurality ofdummy signals provided by a word line of the selected memory cells; and a control logic comparing a count value of a first count latch among the plurality of latches with a reference count value, determining whether to count a second count latch other than the first count latch according to a result of the comparison, and correcting a voltage level of a read signal provided by the word line of the selected memory cells in a read operation. 公开一种存储器装置。一种存储器装置包括：页缓冲器单元，包括多个锁存器，所述多个锁存器根据由选择的存储器单元的字线提供的多个虚设信号，锁存选择的存储器单元的多条虚设数据中的每条虚设数据；控制逻辑，将所述多个锁存器中的第一计数锁存器的计数值与参考计数值进行比较，根据比较结果确定是否对不同于第一计数锁存器的第二计数锁存器进行计数，并且校正在读取操作中由选择的存储器单元的字线提供的读取信号的电压电平。