FPGA internal resource discrimination and positioning method and system
The invention relates to an FPGA internal resource discrimination and positioning method and system. The FPGA internal resource discrimination and positioning method is characterized in that the FPGAinternal resource discrimination and positioning method comprises the following steps: 1) carrying ou...
Gespeichert in:
Hauptverfasser: | , , , , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The invention relates to an FPGA internal resource discrimination and positioning method and system. The FPGA internal resource discrimination and positioning method is characterized in that the FPGAinternal resource discrimination and positioning method comprises the following steps: 1) carrying out the development and configuration of a to-be-processed resource, generating a configuration bit stream, and downloading the configuration bit stream to a to-be-tested FPGA chip; 2) obtaining an initial read-back file of a resource to be processed; 3) generating a configuration bit stream and a secondary read-back file of the new state of the resource to be processed; 4) generating a comparison file; 5) generating a new resource mask file; 6) acquiring a read-back bit stream of the resource tobe processed; 7) discriminating the difference between the read-back bit stream of the to-be-processed resource and the generated configuration bit stream in the new state, and determining an event of the to-be-processed reso |
---|