Bit stream imaging method of field programmable logic gate array device
The invention discloses a bit stream imaging method of a field programmable gate array device. The bit stream imaging method comprises imaging and automatic labeling. The imaging step includes: (1.1)removing irrelevant information, specifically, locking data in a CLB part in a logic part of FPGA pro...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a bit stream imaging method of a field programmable gate array device. The bit stream imaging method comprises imaging and automatic labeling. The imaging step includes: (1.1)removing irrelevant information, specifically, locking data in a CLB part in a logic part of FPGA programmable logic, and abandoning other information in the bit stream imaging process without consideration; 1.2) performing image restoration on the single CLB, and splicing the single CLB restoration images according to the two-dimensional array arrangement line number in the Device image to form awhole bit stream restoration image. The automatic labeling step includes: specifying a resource region range and a bit stream output file name used in the implementation process. The invention provides a brand-new algorithm for converting information used for describing configurable resources in a bit stream into a two-dimensional image with a relatively strong mapping relationship in combinationwith two-dimensional physi |
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