Power semiconductor device and method for manufacturing same

The present invention relates to a power semiconductor device and a method for manufacturing the same. The power semiconductor device includes a drain region and a source region disposed on a substrate, a gate insulating layer and a gate electrode disposed on the substrate and disposed between the d...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: JUN HEE CHO, TAE HOON LEE, JIN SEONG CHUNG
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The present invention relates to a power semiconductor device and a method for manufacturing the same. The power semiconductor device includes a drain region and a source region disposed on a substrate, a gate insulating layer and a gate electrode disposed on the substrate and disposed between the drain region and the source region, a protection layer in contact with a top surface of the substrate and a top surface of the gate electrode, a source contact plug connected to the source region, a drain contact plug connected to the drain region, and a field plate plug in contact with the protection layer, wherein a width of the field plate plug is greater than a width of the source contact plug or a width of the drain contact plug. 本发明涉及功率半导体器件及其制造方法。根据本发明的功率半导体器件包括:布置在基板上的漏极区和源极区;布置在基板上且布置在漏极区与源极区之间的栅极绝缘层和栅电极;与基板的顶表面和栅电极的顶表面接触的保护层;连接至源极区的源极接触插塞;连接至漏极区的漏极接触插塞;以及与保护层接触的场板插塞,其中,场板插塞的宽度大于源极接触插塞的宽度或漏极接触插塞的宽度。