FREQUENCY DIVIDER WITH SELECTABLE FREQUENCY AND DUTY CYCLE

A frequency divider system and method includes a split-divisor frequency divider module. The split-divisor frequency divider module receives a clock signal and generates an output signal based on a first divisor and a second divisor. The clock signal and output signal each have rectangular waveforms characterized by a respective frequency and pulse width. The frequency of the output signal is a selectable integer fraction of the frequency of the clock signal, the frequency of the output signal being selected based on a sum of the first and second divisors. The pulse width of the output signalis a selectable integer number of clock cycles, the pulse width of the output signal being selected based on at least one of the first divisor and the second divisor. 一种分频器系统和方法包括分离除数分频器模块。分离除数分频器模块接收时钟信号，并基于第一除数和第二除数生成输出信号。时钟信号和输出信号各自具有由相应频率和脉冲宽度表征的矩形波形。输出信号的频率是时钟信号的频率的可选的整数分之一，基于第一除数和第二除数之和来选择输出信号的频率。输出信号的脉冲宽度是可选的整数个时钟周期，基于第一除数和第二除数中的至少一个来选择输出信号的脉冲宽度。