Bit Line manufacturing method

The invention discloses a bit Line manufacturing method comprising the steps that firstly a substrate is provided, an amorphous silicon layer covers the substrate, then a titanium nitride layer is formed to cover and contact the amorphous silicon layer, then a titanium layer is formed to cover the t...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: CHEN PINHONG, CHEN YIWEI, CAI ZHIJIE, ZHENG CUNMIN, CHEN ZIJIE, XU QIMAO
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The invention discloses a bit Line manufacturing method comprising the steps that firstly a substrate is provided, an amorphous silicon layer covers the substrate, then a titanium nitride layer is formed to cover and contact the amorphous silicon layer, then a titanium layer is formed to cover the titanium nitride layer, then a conductive layer is formed to cover the titanium layer, then a heatingmanufacturing process is performed to convert the titanium nitride layer into a nitrogen-containing titanium silicide layer and convert the titanium layer into a titanium silicide layer, and then theconductive layer, the titanium silicide layer, the nitrogen-containing titanium silicide layer and the amorphous silicon layer are patterned so as to form a bit line. 本发明公开一种位线的制作方式,包含首先提供一基底,基底上覆盖有一非晶硅层,然后形成一氮化钛层覆盖并接触非晶硅层,之后形成一钛层覆盖氮化钛层,然后形成一导电层覆盖钛层,接着进行一加热制作工艺,将氮化钛层转化成一含氮硅化钛层并且将钛层转化为硅化钛层,然后再图案化导电层、硅化钛层、含氮硅化钛层和非晶硅层以形成一位线。