SYSTEM AND METHOD FOR REDUCING OUTPUT HARMONICS

Disclosed are a system and method for reducing output harmonics. In one form, a power amplifier system includes first and second amplification path, and a combination element. The first amplificationpath has an input for receiving a drive signal, and an output. The second amplification path has an i...

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Bibliographische Detailangaben
Hauptverfasser: VASADI SRIHARSHA, WU SHERRY X, KOROGLU MUSTAFA H
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:Disclosed are a system and method for reducing output harmonics. In one form, a power amplifier system includes first and second amplification path, and a combination element. The first amplificationpath has an input for receiving a drive signal, and an output. The second amplification path has an input coupled to the input of the first amplification path, and an output. The second amplificationpath has a delay element that inserts a signal path delay with respect to the first amplification path, wherein the delay element has a delay corresponding to a harmonic that is desired to be reduced.The combination element is coupled to the output of the first amplification path and an output of the second amplification path, and provides an output signal as a sum of outputs of the first amplification path and the second amplification path. 公开了用于减少输出谐波的系统和方法。在一种形式中,功率放大器系统包括第一放大路径和第二放大路径、以及组合元件。所述第一放大路径具有用于接收驱动信号的输入、和输出。所述第二放大路径具有耦合到所述第一放大路径的输入的输入、和输出。所述第二放大路径具有延迟元件,所述延迟元件相对于所述第一放大路径插入信号路径延迟,其中所述延迟元件具有与期望被减小的谐波相对应的延迟。