SEMICONDUCTOR PACKAGE WITH AIR CAVITY

The invention relates to a semiconductor package with an air cavity. Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier;an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on thesecond side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side. 本公开涉及具有空气腔体的半导体封装件，提供了芯片封装及其对应制造方法的实施例。在芯片封装件的实施例中，该芯片封装件包括：具有第一侧和与第一侧相对