Interposer substrate and semiconductor package

The disclosure provides an interposer substrate and a semiconductor package. The semiconductor package includes a first semiconductor package including a first substrate and a lower semiconductor chipmounted on the first substrate, a second semiconductor package stacked on the first semiconductor package and including a second substrate and an upper semiconductor chip mounted on the second substrate, and an interposer substrate interposed between the first semiconductor package and the second semiconductor package and having a recess recessed from a lower surface facing the lower semiconductor chip, wherein the interposer substrate includes a dummy wiring layer disposed to be adjacent to the recess, in a region overlapped with the lower semiconductor chip, and no electrical signal is applied to the dummy wiring layer. 本公开提供了插入基底和半导体封装件，所述半导体封装件包括：第一半导体封装件，包括第一基底和安装在第一基底上的下半导体芯片；第二半导体封装件，堆叠在第一半导体封装件上并包括第二基底和堆叠在第二基底上的上半导体芯片；以及插入基底，置于第一半导体封装件与第二半导体封装件之间并具有从面向下半导体芯片的下表面凹陷的凹部，其中，插入基底包括在与下半导体芯片叠置的区域中设置为与凹部相邻的虚设布线层，