HIGH SPEED ON-CHIP PRECISION BUFFER WITH SWITCHED-LOAD REJECTION
A buffer system may have an output for driving a switched load that changes during periods indicated by a switching signal. The buffer system may operate in a closed loop when the switching signal indicates that a load change is not taking place by comparing a signal indicative of the output of the...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A buffer system may have an output for driving a switched load that changes during periods indicated by a switching signal. The buffer system may operate in a closed loop when the switching signal indicates that a load change is not taking place by comparing a signal indicative of the output of the buffer system with a reference voltage. The buffer system may operate in an open loop when the switching signal indicates that a load change is taking place by not comparing signal indicative of the output of the buffer system with the reference voltage. Both the buffer system and the switched loadmay be on the same chip.
缓冲系统可以具有用于驱动切换负载的输出,该切换负载在由切换信号指示的时段期间改变。当所述切换信号表示通过比较指示所述缓冲系统的输出的信号与参考电压没有发生负载变化时,缓冲系统可以以闭环操作。当所述切换信号表示通过不比较指示所述缓冲系统的输出的信号与参考电压发生负载变化时,缓冲系统可以以开环操作。缓冲系统和切换负载都可以在同一芯片上。 |
---|