Multi-core processor loading method based on inter-core communication

The invention discloses a multi-core processor program loading method based on inter-core communication. The device comprises a master core, one or more slave cores, a master core external memory anda master core EMI interface, the EMI interface is used for interconnection of a master core external bus interface and an external memory, and an internal RAM memory of the master core is connected with the master core and used for storing programs and data running in the master core after loading. The one or more slave cores are respectively connected with the internal RAM memories correspondingto the one or more slave cores and are used for storing loaded programs or data running in the slave cores. An inter-core communication controller is provided between the master core and the one or more slave cores. The isomorphism of different models under the same architecture is realized. The heterogeneous multi-core processor completes master by adopting a master core boot loader and a mastercore loading program. The m