Two-way processor interconnection server architecture

The invention discloses a two-way processor interconnection server architecture. The architecture comprises a mainboard, and a first Loongson 3B processor, a second Loongson 3B processor, a PCIE bridge chip, a power supply architecture, a state monitoring module and a CPLD module which are arranged on the mainboard; the two Loongson 3B processors are interconnected through an HT bus; the first Loongson 3B processor is connected with a PCIE bridge chip through an HT bus, and the PCIE bridge chip is connected with a PCIE interface, a gigabit network interface, a VGA interface and a serial conversion chip; and the power supply framework is connected with the first Loongson 3B processor, the second Loongson 3B processor and the PCIE bridge chip and supplies power to the first Loongson 3B processor, the second Loongson 3B processor and the PCIE bridge chip. According to the invention, the two Loongson 3B processors are connected through the interconnection bus, so that the calculation performance of the server is