SYSTEM AND METHOD FOR PROVIDING OUTPUT SIGNAL WITHOUT OR WITH REDUCED JITTER

Systems and methods for providing an output signal based at least in part upon an input signal and a clock signal in a manner in which jitter is avoided or diminished, including for example a digital-to-analog converter (DAC), are disclosed herein. In one example embodiment, such a system includes an output signal generating component, a first component having a first switch and a variable characteristic, and a plurality of second components each having a respective additional switch and a respective fixed characteristic. A value of the variable characteristic is set at least in part based upon input and clock signals so that, when the variable characteristic influences at least indirectly the generating of the output signal by the output signal generating component, the output signal attains a first level that at least indirectly depends upon a phase of the clock signal relative to the input signal. 本文中公开用于至少部分地基于输入信号和时钟信号以避免或减少抖动的方式提供输出信号的系统和方法，包括例如数/模转换器(DAC)。在个示例实施例中，此系统包括：输出信号产生组件；第组件，其具有第开关和可变特性；以及多个第二组