System and method for reducing power consumption in electronic circuit

PROBLEM TO BE SOLVED: To reduce the power consumption inside an electronic circuit by respectively fetching a prescribed number of instructions from a memory for every cycle of a fetch circuit during the operation of the fetch circuit in 1st and 2nd power modes. SOLUTION: While the fetch circuit is...

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Hauptverfasser: ALBERT J. LOPER, SOUMMYA MALLICK
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To reduce the power consumption inside an electronic circuit by respectively fetching a prescribed number of instructions from a memory for every cycle of a fetch circuit during the operation of the fetch circuit in 1st and 2nd power modes. SOLUTION: While the fetch circuit is operated in the 1st power mode, N (N is the integer of N>1) pieces of instructions are fetched at a maximum from the memory for every cycle of the fetch circuit. While the fetch circuit is operated in the 2nd power mode, M (M is the integer of N>M>0) pieces of instructions are fetched at a maximum from the memory for every cycle of the fetch circuit. When a special power mode is started, for example, a processor 10 decreases the maximum number of instructions to be fetched within a single cycle, changes the operation of an LSU 28 and decreases the number of 'ways' of an instruction cache 14 and a data cache 16 inside these caches so that the power consumption is reduced.