Dual-track pre-charging logic device

The invention relates to the field of information security, and provides a dual-track pre-charging logic unit suitable for use in a security chip. The logic unit can reduce complexity of applying a dynamic logic circuit to a semi-custom design process, and ensure balance of power consumption of the logic unit under different input signals to cause attackers to be unable to use power consumption information to obtain internal data of the chip. Therefor, the adopted technical solution of the invention is a dual-track pre-charging logic device. The device includes PMOS transistors P1, P2, P3, P4,P5 and P6, NMOS transistors N1, N2, N3, N4, N5, N6, N7, N8, N9, N10 and N11 and two inverters I1 and I2. The device is mainly used in information security occasions. 本发明涉及信息安全领域，为提出种适用于安全芯片的双轨预充电逻辑单元，该逻辑单元可以减少动态逻辑电路应用于半定制设计流程的复杂性，并且保证不同输入信号下逻辑单元功耗的均衡性，使得攻击者不能利用功耗信息获取芯片内部数据。为此，本发明采取的技术方案是，双轨预充电逻辑装置，包括PMOS晶体管P1、P2、P3、P4、P5、P6和NMOS晶体管N1、N2、N3、N4、N5、N6、N7、N8、N9、N10、N11以及两个反相器I1，I2。本发明主要应用于信息安全场合。