NMOS tube and manufacturing method thereof

The invention discloses an NMOS tube which comprises a P well formed on a surface of a silicon substrate, a gate structure formed on a surface of the P well, grooves formed on two sides of the gate structure, and embedded epitaxial layers in the grooves. The embedded epitaxial layers comprise silicon seed layers, silicon phosphorous main body layers, silicon phosphorous buffer layers between the silicon phosphorous main body layers and the silicon seed layers, and silicon cap layers protruding to the tops of the grooves. The silicon phosphorous main body layers have phosphorus heavily-doped structures, the silicon phosphorous buffer layers have phosphorus lightly-doped structures and are used for reducing the number of phosphorus of the embedded epitaxial layers expanded to a peripheral side P well so as to reduce and prevent the influence of the expanded phosphorus on channels. The invention also discloses a manufacturing method of the NMOS tube. The short channel effect of a device can be improved, and ther