power distribution network equivalent circuit on a three-dimensional integrated circuit chip

The invention discloses an on-chip power distribution network equivalent circuit in a three-dimensional integrated circuit, and mainly solves the problems of inaccurate extraction of parasitic parameters of a metal wire and no consideration to the influence of a ground network in a power distributio...

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Bibliographische Detailangaben
Hauptverfasser: DONG GANG, YANG YINTANG, XIA KUILIANG
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The invention discloses an on-chip power distribution network equivalent circuit in a three-dimensional integrated circuit, and mainly solves the problems of inaccurate extraction of parasitic parameters of a metal wire and no consideration to the influence of a ground network in a power distribution network in the prior art. The power distribution network is composed of n layers of plane power distribution networks and TSVs between network layers. wherein each layer of plane power distribution network can be divided into dozens of on-chip unit grids, each on-chip unit grid comprises a power supply metal wire grid, an on-chip load and a ground metal wire grid which are sequentially connected, and each of the power supply metal wire grid and the ground metal wire grid consists of nine inductors and nine resistors which are connected with one another; The on-chip load is composed of an inductor, a resistor, two capacitors and a current source I. Compared with the prior art, the method has higher accuracy and ca