ELECTRONIC DEVICE PACKAGING WITH GALVANIC ISOLATION

In a general aspect, an electronic device assembly can include a dielectric substrate having a first surface and a second surface opposite the first surface and a leadframe including: a first leadframe portion including a first plurality of signal leads; and a second leadframe portion including a second plurality of signal leads. The substrate can be coupled with a subset of the first plurality ofsignal leads and a subset of the second plurality of signal leads. Signal leads of the first plurality of signal leads, other than the subset of the first plurality of signal leads, can be spaced from the dielectric substrate. Signal leads of the second plurality of signal leads, other than the subset of the second plurality of signal leads, can be spaced from the dielectric substrate. The assembly can further include first and second semiconductor die that are electrically coupled with the substrate and the leadframe portions. 本申请涉及具有电隔离的电子装置封装。在个般方面中，种电子装置组合件可包含具有第表面和与所述第表面相对的第二表面的电介质衬底，以及引线框，所述引线框包含：包含第多个信号引线的第引线框