PARALLEL TEST STRUCTURE

The invention relates to a parallel test structure. An exemplary apparatus includes a testing module connected to, and providing a test voltage to, an integrated circuit containing devices under test.The testing module performs a time-dependent dielectric breakdown (TDDB) test on the devices under test. A decoder is connected to the devices under test and the testing module. The decoder selectively connects each device being tested to the testing module. Efuses are connected to a different one of the devices under test. The efuses separately electrically disconnect each of the devices under test from the test voltage upon failure of a corresponding device under test. Protection circuits are connected between the efuses and a ground voltage. Each protection circuit provides a shunt aroundthe decoder upon failure of the device under test. 本发明涉及并行测试结构，其中，示例装置包括与包含被测装置的集成电路连接并向其提供测试电压的测试模块。该测试模块在该被测装置上执行时间相关介电击穿(TDDB)测试。解码器与该被测装置及该测试模块连接。该解码器选择性连接各被测装置至该测试模块。电子熔丝与该被测装置中不同的个连接。当相应被测装置失效时，该电子熔丝将各该被测装置与该测试电压单独电性断开。保