A memory and a data read drive circuit thereof
The invention provides a memory and a data reading driving circuit thereof, comprising: a front unit adapted to receive a data signal; the front unit generates a front pull-up signal and a front pull-down signal according to the data signal; A pull-up signal generation unit having a power terminal a...
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Hauptverfasser: | , , |
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a memory and a data reading driving circuit thereof, comprising: a front unit adapted to receive a data signal; the front unit generates a front pull-up signal and a front pull-down signal according to the data signal; A pull-up signal generation unit having a power terminal and a ground terminal, the pull-up signal generation unit generating a pull-up signal according to the front pull-up signal; A pull-down signal generation unit having a power terminal and a ground terminal, the pull-down signal generation unit generating a pull-down signal according to the front pull-down signal; An output unit that generates an output signal according to the pull-up signal and the pull-down signal, wherein the power terminal of the pull-up signal generation unit is connected with a power supply voltage, and the ground terminal of the pull-up signal generation unit is connected with the pull-down signal; The power supply terminal of the pull-down signal generating unit is connected with the pull-up |
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