DC OFFSET CALIBRATION OF ADC WITH ALTERNATE COMPARATORS

System and method of calibrating the DC offsets of alternate comparators in an ADC in the background based on the digital outputs of the ADC. In parallel with AID conversion of a plurality of samples,the calibration logic uses two counters to count the occurrences of the ADC outputs that represent samples falling in a first analog range and a second analog range, respectively. The two ranges aresymmetric about the MSB reference voltage and in combination cover the nominal voltage range of the bit. The DC offset is derived based on a ratio of the difference between the two counts and a sum ofthe two counts. The calibration logic may alternately calibrate the comparators. Each comparator may be calibrated successively based on various bits associated therewith. 种基于ADC的数字输出在后台校准ADC中的交替比较器的DC偏移的系统和方法。校准逻辑使用两个计数器分别计数表示落入第模拟范围和第二模拟范围的采样的ADC输出的出现，计数与多个采样的A/D转换并行进行。两个范围关于MSB参考电压对称，并且组合覆盖该比特的标称电压范围。基于两个计数之差与两个计数之和的比率导出DC偏移。校准逻辑可以交替地校准比较器。可以基于与其相关联的各个比特连续地校准每个比较器。