Three-state gate device

The invention discloses a three-state gate device. A three-state gate device includes a first NOR gate, a first inverter, a first NAND gate, a second inverter, a first PMOS transistor, and a first NMOS transistor. The chip area can be effectively reduced by using the device. 本发明公开了种三态门装置。种三态门装置包括第或非门、第反相器、第与非门、第二反相器、第PMOS管和第NMOS管。利用本发明可以有效地减小芯片面积。