Time sequence controller and display device

The invention provides a time sequence controller and a display device. The time sequence controller comprises a storage module, an enabling signal reproduction module and a selective output module. The time sequence controller detects an input enabling signal through using the enabling signal reproduction module, and produces a converted enabling signal the burr-free waveform to serve as a read enable of the storage module, thereby being capable of eliminating display picture anomalies brought by the existence of burrs of the input enabling signal. Meanwhile, if there is no effective video input within a preset time, the enabling signal reproduction module controls the selective output module to output empty data, thereby being capable of eliminating display picture anomalies caused by sudden disappearance of video data. 本发明提供种时序控制器及显示装置。本发明的时序控制器包括存储模块、使能信号重产生模块以及选择输出模块。通过利用使能信号重产生模块对输入使能信号进行侦测，产生波形无毛刺的转换使能信号作为存储模块的读使能，能够消除输入使能信号存在毛刺带来的显示画面异常，同时，若超过预设时长内没有有效视频输入，使能信号重产生模块控制选择输出模块输出空数据，能够消除由于视频资料突然消失造成的显示画面异