Semiconductor structure and manufacturing method thereof

Semiconductor structure and manufacturing method thereof

The present application provides a semiconductor structure and a manufacturing method thereof. The manufacturing method comprises the following steps: S1, forming a first to-be-bonded structure and asecond to-be-bonded structure, wherein the first to-be-bonded structure comprises a sacrificial layer...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: WANG GUILEI, HENRY H.ADAMSON
Format: Patent
Sprache:chi ; eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator WANG GUILEI
HENRY H.ADAMSON
description The present application provides a semiconductor structure and a manufacturing method thereof. The manufacturing method comprises the following steps: S1, forming a first to-be-bonded structure and asecond to-be-bonded structure, wherein the first to-be-bonded structure comprises a sacrificial layer and a predetermined bonded structure layer, and the structure layer and the sacrificial layer forming a heterojunction; S2, applying an acting force F to the first to-be-bonded structure and/or the second to-be-bonded structure for a predetermined time, so that the first to-be-bonded structure andthe second to-be-bonded structure are attached, and the structure layer is in contact with the second to-be-bonded structure; heating the first to-be-bonded structure and the second to-be-bonded structure to form a pre-semiconductor structure; and S3, removing the sacrificial layer to form a semiconductor structure. According to the manufacturing method, a strain is introduced into the structurelayer, a strained structure
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN108878263A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN108878263A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN108878263A3</originalsourceid><addsrcrecordid>eNrjZLAITs3NTM7PSylNLskvUiguKQIySotSFRLzUhRyE_NK0xJB_My8dIXc1JKM_BSFkozUotT8NB4G1rTEnOJUXijNzaDo5hri7KGbWpAfn1pckJicmpdaEu_sZ2hgYWFuYWRm7GhMjBoAdBgvOg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor structure and manufacturing method thereof</title><source>esp@cenet</source><creator>WANG GUILEI ; HENRY H.ADAMSON</creator><creatorcontrib>WANG GUILEI ; HENRY H.ADAMSON</creatorcontrib><description>The present application provides a semiconductor structure and a manufacturing method thereof. The manufacturing method comprises the following steps: S1, forming a first to-be-bonded structure and asecond to-be-bonded structure, wherein the first to-be-bonded structure comprises a sacrificial layer and a predetermined bonded structure layer, and the structure layer and the sacrificial layer forming a heterojunction; S2, applying an acting force F to the first to-be-bonded structure and/or the second to-be-bonded structure for a predetermined time, so that the first to-be-bonded structure andthe second to-be-bonded structure are attached, and the structure layer is in contact with the second to-be-bonded structure; heating the first to-be-bonded structure and the second to-be-bonded structure to form a pre-semiconductor structure; and S3, removing the sacrificial layer to form a semiconductor structure. According to the manufacturing method, a strain is introduced into the structurelayer, a strained structure</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20181123&amp;DB=EPODOC&amp;CC=CN&amp;NR=108878263A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20181123&amp;DB=EPODOC&amp;CC=CN&amp;NR=108878263A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WANG GUILEI</creatorcontrib><creatorcontrib>HENRY H.ADAMSON</creatorcontrib><title>Semiconductor structure and manufacturing method thereof</title><description>The present application provides a semiconductor structure and a manufacturing method thereof. The manufacturing method comprises the following steps: S1, forming a first to-be-bonded structure and asecond to-be-bonded structure, wherein the first to-be-bonded structure comprises a sacrificial layer and a predetermined bonded structure layer, and the structure layer and the sacrificial layer forming a heterojunction; S2, applying an acting force F to the first to-be-bonded structure and/or the second to-be-bonded structure for a predetermined time, so that the first to-be-bonded structure andthe second to-be-bonded structure are attached, and the structure layer is in contact with the second to-be-bonded structure; heating the first to-be-bonded structure and the second to-be-bonded structure to form a pre-semiconductor structure; and S3, removing the sacrificial layer to form a semiconductor structure. According to the manufacturing method, a strain is introduced into the structurelayer, a strained structure</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAITs3NTM7PSylNLskvUiguKQIySotSFRLzUhRyE_NK0xJB_My8dIXc1JKM_BSFkozUotT8NB4G1rTEnOJUXijNzaDo5hri7KGbWpAfn1pckJicmpdaEu_sZ2hgYWFuYWRm7GhMjBoAdBgvOg</recordid><startdate>20181123</startdate><enddate>20181123</enddate><creator>WANG GUILEI</creator><creator>HENRY H.ADAMSON</creator><scope>EVB</scope></search><sort><creationdate>20181123</creationdate><title>Semiconductor structure and manufacturing method thereof</title><author>WANG GUILEI ; HENRY H.ADAMSON</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN108878263A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>WANG GUILEI</creatorcontrib><creatorcontrib>HENRY H.ADAMSON</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WANG GUILEI</au><au>HENRY H.ADAMSON</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor structure and manufacturing method thereof</title><date>2018-11-23</date><risdate>2018</risdate><abstract>The present application provides a semiconductor structure and a manufacturing method thereof. The manufacturing method comprises the following steps: S1, forming a first to-be-bonded structure and asecond to-be-bonded structure, wherein the first to-be-bonded structure comprises a sacrificial layer and a predetermined bonded structure layer, and the structure layer and the sacrificial layer forming a heterojunction; S2, applying an acting force F to the first to-be-bonded structure and/or the second to-be-bonded structure for a predetermined time, so that the first to-be-bonded structure andthe second to-be-bonded structure are attached, and the structure layer is in contact with the second to-be-bonded structure; heating the first to-be-bonded structure and the second to-be-bonded structure to form a pre-semiconductor structure; and S3, removing the sacrificial layer to form a semiconductor structure. According to the manufacturing method, a strain is introduced into the structurelayer, a strained structure</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN108878263A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor structure and manufacturing method thereof
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-24T06%3A17%3A45IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WANG%20GUILEI&rft.date=2018-11-23&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN108878263A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true