Computing system and processor with fast power surge detection and instruction throttle down to provide for low cost power supply unit

A processor is described that includes a quick signal path from an input of the processor to logic circuitry within the processor. The input is to receive a fast throttle down signal. The logic circuitry is to throttle down a rate at which the processor issues instructions for execution in response to the fast throttle down signal. The quick signal path is to impose practicably minimal propagationdelay of the fast throttle down signal within the processor. 描述了包括从处理器的输入到处理器内的逻辑电路的快速信号路径的处理器。输入用于接收快速节流信号。逻辑电路用于响应于快速节流信号节流处理器发出指令用于执行的速率。快速信号路径将强制处理器内的快速节流信号的可实行最小传播延迟。