Bias voltage generating circuit and memory control circuit

The present invention provides a bias voltage generating circuit and a memory control circuit, the bias voltage generating circuit includes a first power up sequence and a second power up sequence. Inthe first power up sequence, a first voltage signal is generated by a first power up circuit, and a charge pump generates a pump bias when the first voltage signal reaches a first predetermined voltage; and in the second power up sequence, the second power up sequence generates a second voltage signal, a bias switch is opened when the second voltage signal reaches a second predetermined voltage,and the pump bias generated by the charge pump is outputted via the bias switch to form an output bias. The time when the second voltage signal reaches the second predetermined voltage is later than the time when the first voltage signal reaches the first predetermined voltage. In the bias voltage generating circuit, a stable output bias is formed more quickly by the first power up sequence and the second power up sequence