DUAL-LAYER DIELECTRIC IN MEMORY DEVICE
Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines disposed in a memory region of a die. Fill regions may be disposed between respective pairs of adjacent wordlines of the plurality of wordlines....
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines disposed in a memory region of a die. Fill regions may be disposed between respective pairs of adjacent wordlines of the plurality of wordlines. The fill regions may include a first dielectric layer and a second dielectric layer disposed on thefirst dielectric layer. The first dielectric layer may comprise organic (e.g., carbon-based) spin-on dielectric material (CSOD). The second dielectric layer may comprise a different dielectric material than the first dielectric layer, such as, for example, inorganic dielectric material. Other embodiments may be described and/or claimed.
本公开内容的实施例描述了用于包括具有设置在管芯的存储器区域中的多条字线的存储器阵列的存储设备的技术和配置。填充区域可以设置在多条字线中的相应相邻字线对之间。填充区域可以包括第电介质层和设置在第电介质层上的第二电介质层。第电介质层可以包括有机(例如,基于碳的)旋涂电介质材料(CSOD)。例如,第二电介质层可以包括与第电介质层不同的电介质材料,诸如无机电介质材料。描述和/或要求保护了其他实施例。 |
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