Semiconductor memory device
The inventive concept relates to a semiconductor storage device. The semiconductor device includes a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bi...
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | YONG KWAN KIM KWANGMIN KIM JIYOUNG KIM YE-RO LEE JUNGWOO SONG KWANGTAE HWANG |
description | The inventive concept relates to a semiconductor storage device. The semiconductor device includes a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. Thecapping pattern defines a top surface of the air spacer and comprises a metallic material.
本发明构思涉及种半导体存储器件。种半导体器件包括包含有源区域的衬底。位线结构延伸跨过有源区域。着落垫设置在有源区域的端部上。第间隔物设置在位线结构与着落垫之间。第二间隔物设置在第间隔物与着落垫之间。空气间隔物设置在第间隔物与第二间隔物之间。盖图案设置在着落垫的侧壁与位线结构的侧壁之间。盖图案限定空气间隔物的顶表面并包括金属性材料。 |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN108206184A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN108206184A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN108206184A3</originalsourceid><addsrcrecordid>eNrjZJAOTs3NTM7PSylNLskvUshNzc0vqlRISS3LTE7lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GBhZGBmaGFiaOxsSoAQCTbSOm</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor memory device</title><source>esp@cenet</source><creator>YONG KWAN KIM ; KWANGMIN KIM ; JIYOUNG KIM ; YE-RO LEE ; JUNGWOO SONG ; KWANGTAE HWANG</creator><creatorcontrib>YONG KWAN KIM ; KWANGMIN KIM ; JIYOUNG KIM ; YE-RO LEE ; JUNGWOO SONG ; KWANGTAE HWANG</creatorcontrib><description>The inventive concept relates to a semiconductor storage device. The semiconductor device includes a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. Thecapping pattern defines a top surface of the air spacer and comprises a metallic material.
本发明构思涉及种半导体存储器件。种半导体器件包括包含有源区域的衬底。位线结构延伸跨过有源区域。着落垫设置在有源区域的端部上。第间隔物设置在位线结构与着落垫之间。第二间隔物设置在第间隔物与着落垫之间。空气间隔物设置在第间隔物与第二间隔物之间。盖图案设置在着落垫的侧壁与位线结构的侧壁之间。盖图案限定空气间隔物的顶表面并包括金属性材料。</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180626&DB=EPODOC&CC=CN&NR=108206184A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180626&DB=EPODOC&CC=CN&NR=108206184A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YONG KWAN KIM</creatorcontrib><creatorcontrib>KWANGMIN KIM</creatorcontrib><creatorcontrib>JIYOUNG KIM</creatorcontrib><creatorcontrib>YE-RO LEE</creatorcontrib><creatorcontrib>JUNGWOO SONG</creatorcontrib><creatorcontrib>KWANGTAE HWANG</creatorcontrib><title>Semiconductor memory device</title><description>The inventive concept relates to a semiconductor storage device. The semiconductor device includes a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. Thecapping pattern defines a top surface of the air spacer and comprises a metallic material.
本发明构思涉及种半导体存储器件。种半导体器件包括包含有源区域的衬底。位线结构延伸跨过有源区域。着落垫设置在有源区域的端部上。第间隔物设置在位线结构与着落垫之间。第二间隔物设置在第间隔物与着落垫之间。空气间隔物设置在第间隔物与第二间隔物之间。盖图案设置在着落垫的侧壁与位线结构的侧壁之间。盖图案限定空气间隔物的顶表面并包括金属性材料。</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAOTs3NTM7PSylNLskvUshNzc0vqlRISS3LTE7lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GBhZGBmaGFiaOxsSoAQCTbSOm</recordid><startdate>20180626</startdate><enddate>20180626</enddate><creator>YONG KWAN KIM</creator><creator>KWANGMIN KIM</creator><creator>JIYOUNG KIM</creator><creator>YE-RO LEE</creator><creator>JUNGWOO SONG</creator><creator>KWANGTAE HWANG</creator><scope>EVB</scope></search><sort><creationdate>20180626</creationdate><title>Semiconductor memory device</title><author>YONG KWAN KIM ; KWANGMIN KIM ; JIYOUNG KIM ; YE-RO LEE ; JUNGWOO SONG ; KWANGTAE HWANG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN108206184A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>YONG KWAN KIM</creatorcontrib><creatorcontrib>KWANGMIN KIM</creatorcontrib><creatorcontrib>JIYOUNG KIM</creatorcontrib><creatorcontrib>YE-RO LEE</creatorcontrib><creatorcontrib>JUNGWOO SONG</creatorcontrib><creatorcontrib>KWANGTAE HWANG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YONG KWAN KIM</au><au>KWANGMIN KIM</au><au>JIYOUNG KIM</au><au>YE-RO LEE</au><au>JUNGWOO SONG</au><au>KWANGTAE HWANG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor memory device</title><date>2018-06-26</date><risdate>2018</risdate><abstract>The inventive concept relates to a semiconductor storage device. The semiconductor device includes a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. Thecapping pattern defines a top surface of the air spacer and comprises a metallic material.
本发明构思涉及种半导体存储器件。种半导体器件包括包含有源区域的衬底。位线结构延伸跨过有源区域。着落垫设置在有源区域的端部上。第间隔物设置在位线结构与着落垫之间。第二间隔物设置在第间隔物与着落垫之间。空气间隔物设置在第间隔物与第二间隔物之间。盖图案设置在着落垫的侧壁与位线结构的侧壁之间。盖图案限定空气间隔物的顶表面并包括金属性材料。</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_CN108206184A |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor memory device |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-01T14%3A08%3A20IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=YONG%20KWAN%20KIM&rft.date=2018-06-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN108206184A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |