Integrated circuit, and computing system and computer-implemented method for designing integrated circuit

A computer-implemented method includes placing standard cells based on design data defining an integrated circuit. A layout of the integrated circuit is generated by performing colorless routing. First, second, third and fourth patterns included in a quadruple patterning lithography (QPL) layer are arranged, based on space constraints, on the placed standard cells. The generated layout is stored to a computer-readable storage medium. The space constraints define minimum spaces between the first, second, third and fourth patterns. The method includes assigning first, second, third and fourth colors to the first, second, third and fourth patterns, respectively. Masks are generated based on the layout. A semiconductor device is manufactured by using the generated masks. A space between two patterns of the first, second, third and fourth patterns smaller than a corresponding space constraint of the space constraints indicates a color violation. 计算机实施的方法包括基于定义集成电路的设计数据来放置标准单元。通过执行无色布线来生成集成电路的布局。基于间隔约束，将包括在四重图案化光刻(