Low-conducting resistor MIS groove grid GaN base transistor and preparing method thereof

The invention relates to the field of semiconductor devices, and discloses a low-conducting resistor MIS groove grid GaN base transistor and a preparing method thereof. Grid trench resistor is mainlycontrolled by regulating the grid length of a 2DEG-free area (namely the groove side wall) on a groove grid. The transistor comprises a substrate, an epitaxial layer, a grid medium layer, a source electrode, a drain electrode and a grid electrode, wherein the epitaxial layer, the grid medium layer, the source electrode, the drain electrode and the grid electrode grow on the substrate. The epitaxial layer comprises a stress buffering layer, a GaN epitaxial layer, an AlN layer and a secondary epitaxial layer which is for selected area growth, wherein the stress buffering layer, the GaN epitaxiallayer and the AlN layer are for primary epitaxial growth, and a groove trench is formed. Then the grid medium layer is deposited, the source electrode and the drain electrode are formed, and the gridelectrode is formed on the