Semiconductor and method for manufacturing same

A method and structure for forming a local interconnect, without routing the local interconnect through an overlying metal layer. In various embodiments, a first dielectric layer is formed over a gatestack of at least one device and a second dielectric layer is formed over a contact metal layer of t...

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Bibliographische Detailangaben
Hauptverfasser: LIN YIHSIUNG, CHANG SHANGWEN
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:A method and structure for forming a local interconnect, without routing the local interconnect through an overlying metal layer. In various embodiments, a first dielectric layer is formed over a gatestack of at least one device and a second dielectric layer is formed over a contact metal layer of the at least one device. In various embodiments, a selective etching process is performed to removethe second dielectric layer and expose the contact metal layer, without substantial removal of the first dielectric layer. In some examples, a metal VIA layer is deposited over the at least one device. The metal VIA layer contacts the contact metal layer and provides a local interconnect structure. In some embodiments, a multi-level interconnect network overlying the local interconnect structure is formed. An embodiment of the invention also relates to a semiconductor and a method for manufacturing the same. 种用于形成局部互连的方法和结构,而不通过上面的金属层来路由局部互连。在些实施例中,在至少个器件的栅极堆叠件上方形成第介电层并且在至少个器件的接触金属层上方形成第二介电层。在各个实施例中,实施选择性蚀刻工艺以去除第二介电层并暴