Testing system and method based on chip port current driving capability
The invention discloses a testing system based on the chip port current driving capability; the testing system comprises a to-be-tested chip, a main control chip, a test I/O port channel selection module, a testing load module, a voltage sampling channel selection module and a sinking/sourcing curre...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a testing system based on the chip port current driving capability; the testing system comprises a to-be-tested chip, a main control chip, a test I/O port channel selection module, a testing load module, a voltage sampling channel selection module and a sinking/sourcing current selection module; the testing method comprises the following steps: allowing the system to control the to-be-tested chip to enter a FT test mode and select a test current type; allowing the main control chip to control the to-be-tested chip I/O port to output the corresponding level, and controlling the to-be-tested chip to output a driving current; controlling the testing load module to select the corresponding testing load according to the driving current gear; selecting a to-be-tested IO port; gathering voltage on two ends of the testing load; sampling to calculate the voltage on two ends of each I/O port load and the driving current size, and determining whether the obtained voltage and current respectively |
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