FULLY VALID-GATED READ AND WRITE FOR LOW POWER ARRAY

In an array that qualifies each row according to a valid/invalid state, each row may each include valid-gated read circuitry to conditionally block a read wordline from toggling unless the row storesa data word that has a valid state or a read force signal is asserted. Furthermore, in a write operation, each row may have valid-gated write circuitry that conditionally blocks a write wordline fromtoggling unless input data to be written to the row has a valid state or a write force signal is asserted. Moreover, output latch clocking may be blocked from toggling unless a row to be read stores adata word that has a valid state or the read force signal is asserted, and input latch clocking may also be blocked unless the input data to be written has a valid state or the write force signal isasserted. 在根据有效/无效状态限定每行的阵列(200)中，每行可各自包含有效门控读取电路(220)，所述有效门控读取电路有条件地根据有效位胞元(224)的状态阻止读取字线双态切换，除非所述行存储具有有效状态的数据字或读取强制信号经确证。此外，在写入操作中，每行可具有有效门控写入电路(320)，所述有效门控写入电路有条件地阻止写入字线双态切换，除非待写入到所述行的输入数据具有有效状态或写入强制信号经确证。此外，除非待读取的行存储具有有效状态的数