Low-dropout linear voltage stabilizer with high power supply rejection ratio

The invention relates to a low-dropout linear voltage stabilizer with the high power supply rejection ratio and belongs to the technical field of power management. A drain electrode of a power tube passes through a first divider resistor and is connected with one end of a second divider resistor and the first input end of an error amplifier, and a reference voltage is connected with the second input end of the error amplifier; grid electrodes of a clamping operational amplifier and a fourteenth NMOS tube MN14 in feedforward access are connected with the grid electrode of a fifteenth NMOS tube MN15 and the output end of the error amplifier, and the drain electrodes of the clamping operational amplifier and the fourteenth NMOS tube MN14 in the feedforward access are connected with the drain electrode of a tenth PMOS tube MP10, the grid electrode of a ninth PMOS tube MP9 and the positive input end of a super source follower structure; the source electrode of the tenth PMOS tube MP10 is connected with the drain e