Run time ECC error injection scheme for hardware validation

Systems and methods for a run-time error correction code (''ECC'') error injection scheme for hardware validation are disclosed. The systems and methods include configuring a read path to internally forward read data, and injecting at least one faulty bit into the forwarded read...

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Bibliographische Detailangaben
Hauptverfasser: RANGARAJAN SANKAR, CATHERWOOD MICHAEL, IVEY BRANT
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:Systems and methods for a run-time error correction code (''ECC'') error injection scheme for hardware validation are disclosed. The systems and methods include configuring a read path to internally forward read data, and injecting at least one faulty bit into the forwarded read data via a read fault injection logic. The systems and methods may also include configuring a write path to internally forward write data, and injecting at least one faulty bit into the forwarded write data via a write fault injection logic. 本发明揭示用于硬件验证的运行时间错误校正码"ECC"的错误注入方案的系统及方法。所述系统及方法包含:配置读取路径来内部转发读取数据;及经由读取失效注入逻辑而将至少个失效位注入到所述转发读取数据中。所述系统及方法还可包含:配置写入路径来内部转发写入数据;及经由写入失效注入逻辑而将至少个失效位注入到所述转发写入数据中。